The integrated readout module provides 4-channel readout excitation channel, 4-channel readout signal direct acquisition channel, and maintains good synchronization between transceiver to ensure the long-term stability of quantum state readout. A single module supports simultaneous hardware demodulation, determination and statistics of up to 64 qubits. The built-in CPU is used to process the waveform computational tasks for scale expansion.
Provides 4 microwave direct output channels, 4 microwave direct acquisition channels;
Output/Input interface: SMA 50 ohm AC coupled;
DAC/ADC channel vertical resolution: 14 bit;
DAC sampling rate: adjustable in 200 Msps steps within the range of 5 Gsps - 9.8 Gsps;
Output frequency range: 3 GHz-12 GHz, with instanta neous bandwidth ≥3.5 GHz;
Output power: ≥-12 dBm @ 3.2 GHz-6.5 GHz; ≥-15 dBm @ 6.0GHz-7.8GHz;
Output phase noise: ≤-95 dBc/Hz @ 4.0 GHz, 1 kHz offset; ≤-90 dBc/Hz @ 8.0 GHz, 1 kHz offset;
Single-tone SFDR: ≤-55dBc @ 4.0 GHz-8.0 GHz;
Waveform length: ≥60 us @ 8 Gsps;
Channel isolation: ≥52dBc;
ADC sampling rate: adjustable in 200 Msps steps within the range of 2.0 Gsps - 4.8 Gsps;
Each ADC channel supports up to 16 modes hardware demodulation and determination, with the entire module supporting simultaneous demodulation, decision, and statistics for 64 qubits;
Supports feedback with a delay of about 200 ns;
Built-in high-performance x86 processor, capable of local waveform computation and generation.
